For register files with single ended sensing, an inverter is used as a sense amplifier (also referred to as “sense inverter”). During read 0 operation, the bit line is discharged to a voltage below the switching threshold voltage of sense inverter, after the word line is enabled and the pre-charging of the bit line is turned off. During read 1 operation, the bit line discharges due to memory cell leakage but remains at the voltage above the switching threshold voltage of sense inverter. Due to higher leakage in latest CMOS (complementary metal-oxide-semiconductor) technology nodes, the bit line keeper circuit is introduced at the bit line in such a way that the bit line is not discharged to the voltage below the switching threshold voltage of sense inverter. However, the bit line keeper circuit impacts memory access time which is mainly dominated by read 0 operation.